显示标签为“系统调试”的博文。显示所有博文
显示标签为“系统调试”的博文。显示所有博文

2009年2月4日

miniBfin启动busybox成功

1. 设置CONFIG_INITRAMFS_SOURCE="image根目录"，不需要设置roo=....内核参数，比linux2.4方便多了。
2. 写一个启动shell的程序
#include <stdio.h>
#include <unistd.h>

int
main(init argc, char argv[])
{
printf("Hello world from initramfs!\n");
system("/bin/sh");
sleep(99999);
return 0;
}
3.编译
bfin-linux-uclibc-gcc -o init -static -s init.c
4.将init放到image根目录下面
5.创建console设备
mknod -m 600 dev/console c 5 1

请参考：深入理解 Linux 2.6 的 initramfs 机制 (上)

启动后的信息：
U-Boot 1.1.5 (Feb 4 2009 - 14:52:53)

CPU: ADSP BF532 Rev.: 0.5
Board: miniBfin
http://bfincn.blogspot.com
Clock: VCO: 400 MHz, Core: 400 MHz, System: 133 MHz
SDRAM: 32 MB
*** Warning - bad CRC, using default environment

In: serial
Out: serial
Err: serial
No ethernet found.
starting from spi flash
Hit any key to stop autoboot: 0

EEPROM @0x0 read: addr 0x01000000 off 0x30000 count 0x200000

done
## Booting image at 01000000 ...
Image Name: Linux-2.6.28-ADI-2009R1-pre-svn6
Image Type: Blackfin Linux Kernel Image (gzip compressed)
Data Size: 1921753 Bytes = 1.8 MB
Load Address: 00001000
Entry Point: 001b0fa4
Verifying Checksum ... OK
Uncompressing Kernel Image ... OK
Starting Kernel at = 1b0fa4
Linux version 2.6.28-ADI-2009R1-pre-svn6028 (root@debian) (gcc version 4.1.2 (ADI svn)) #37 Wed Feb 4 14:32:22 CST 2009
Board Memory: 32MB
Kernel Managed Memory: 32MB
Memory map:
fixedcode = 0x00000400-0x00000490
text = 0x00001000-0x0012f260
rodata = 0x0012f260-0x001883f4
bss = 0x00188400-0x00197124
data = 0x00197124-0x001aa000
stack = 0x001a8000-0x001aa000
init = 0x001aa000-0x002a4000
available = 0x002a4000-0x01eff000
DMA Zone = 0x01f00000-0x02000000
Hardware Trace Active and Enabled
Boot Mode: 6
Blackfin support (C) 2004-2008 Analog Devices, Inc.
Compiled for ADSP-BF532 Rev 0.5
Blackfin Linux support by http://blackfin.uclinux.org/
Processor Speed: 400 MHz core clock and 133 MHz System Clock
Built 1 zonelists in Zone order, mobility grouping off. Total pages: 7873
Kernel command line: console=ttyBF0,115200
Configuring Blackfin Priority Driven Interrupts
PID hash table entries: 128 (order: 7, 512 bytes)
console [ttyBF0] enabled
Dentry cache hash table entries: 4096 (order: 2, 16384 bytes)
Inode-cache hash table entries: 2048 (order: 1, 8192 bytes)
Memory available: 28736k/32768k RAM, (1000k init code, 1208k kernel code, 492k data, 1024k dma, 304k reserved)
Calibrating delay loop... 782.33 BogoMIPS (lpj=1564672)
Security Framework initialized
Mount-cache hash table entries: 512
Blackfin Scratchpad data SRAM: 4 KB
Blackfin L1 Data A SRAM: 16 KB (15 KB free)
Blackfin L1 Data B SRAM: 16 KB (16 KB free)
Blackfin L1 Instruction SRAM: 48 KB (41 KB free)
PDA for CPU0 reserved at 001890e8
net_namespace: 424 bytes
NET: Registered protocol family 16
Blackfin GPIO Controller
Blackfin DMA Controller
ip0x_init(): registering device resources
SCSI subsystem initialized
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
NET: Registered protocol family 2
IP route cache hash table entries: 1024 (order: 0, 4096 bytes)
TCP established hash table entries: 1024 (order: 1, 8192 bytes)
TCP bind hash table entries: 1024 (order: 0, 4096 bytes)
TCP: Hash tables configured (established 1024 bind 1024)
TCP reno registered
NET: Registered protocol family 1
msgmni has been set to 56
io scheduler noop registered
io scheduler anticipatory registered (default)
io scheduler cfq registered
Serial: Blackfin serial driver
bfin-uart.1: ttyBF0 at MMIO 0xffc00400 (irq = 21) is a BFIN-UART
brd: module loaded
dm9000 Ethernet Driver, V1.31
dm9000 dm9000.0: read wrong id 0x4a4a4a4a
dm9000 dm9000.0: read wrong id 0x4a4a4a4a
dm9000 dm9000.0: read wrong id 0x4a4a4a4a
dm9000 dm9000.0: read wrong id 0x4a4a4a4a
dm9000 dm9000.0: read wrong id 0x4a4a4a4a
dm9000 dm9000.0: read wrong id 0x4a4a4a4a
dm9000 dm9000.0: read wrong id 0x4a4a4a4a
dm9000 dm9000.0: read wrong id 0x4a4a4a4a
dm9000 dm9000.0: wrong id: 0x4a4a4a4a
dm9000 dm9000.0: not found (-19).
dm9000 dm9000.1: read wrong id 0x4a4a4a4a
dm9000 dm9000.1: read wrong id 0x4a4a4a4a
dm9000 dm9000.1: read wrong id 0x4a4a4a4a
dm9000 dm9000.1: read wrong id 0x4a4a4a4a
dm9000 dm9000.1: read wrong id 0x4a4a4a4a
dm9000 dm9000.1: read wrong id 0x4a4a4a4a
dm9000 dm9000.1: read wrong id 0x4a4a4a4a
dm9000 dm9000.1: read wrong id 0x4a4a4a4a
dm9000 dm9000.1: wrong id: 0x4a4a4a4a
dm9000 dm9000.1: not found (-19).
Driver 'sd' needs updating - please use bus_type methods
usbmon: debugfs is not available
driver isp1362-hcd, 2005-04-04
isp1362-hcd isp1362-hcd.0: ISP1362 Host Controller
isp1362-hcd isp1362-hcd.0: new USB bus registered, assigned bus number 1
isp1362_hc_reset:
Software reset timeout
Clock not ready after 100ms
isp1362-hcd isp1362-hcd.0: can't setup
isp1362-hcd isp1362-hcd.0: USB bus 1 deregistered
init error, -19
Initializing USB Mass Storage driver...
usbcore: registered new interface driver usb-storage
USB Mass Storage support registered.
ip_tables: (C) 2000-2006 Netfilter Core Team
TCP cubic registered
NET: Registered protocol family 17
drivers/rtc/hctosys.c: unable to open rtc device (rtc0)
Freeing unused kernel memory: 1000k freed
dma_alloc_init: dma_page @ 0x01d5a000 - 256 pages at 0x01f00000
Hello world from initramfs!


BusyBox v1.13.2 (2009-02-04 13:18:58 CST) built-in shell (msh)
Enter 'help' for a list of built-in commands.

# free
total used free shared buffers
Mem: 29736 5364 24372 0 0
Swap: 0 0 0
Total: 29736 5364 24372
#
发帖者 Blackfin 时间： 15:11:00 0 评论
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miniBfin启动Linux操作系统成功

在调试中碰到一些问题，主要是：
1.对image的loading address和entry address理解上有错误，导致uboot解压vmImage失败，以后再分析。
2.由于miniBfin没有flash部分，在setup_arch会导致kernel panic，但是这时由于console driver还没有加载，无法输出printk消息，弄得我只好写一小段UART的打印函数进行调试，还好最终找到原因。

下面是系统启动的信息。还有很多工作没有完成，慢慢来。

U-Boot 1.1.5 (Feb 2 2009 - 22:25:59)

CPU: ADSP BF532 Rev.: 0.5
Board: miniBfin
http://bfincn.blogspot.com
Clock: VCO: 400 MHz, Core: 400 MHz, System: 133 MHz
SDRAM: 32 MB
*** Warning - bad CRC, using default environment

In: serial
Out: serial
Err: serial
No ethernet found.
starting from spi flash
Hit any key to stop autoboot: 0

EEPROM @0x0 read: addr 0x01000000 off 0x30000 count 0x110000

done
## Booting image at 01000000 ...
Image Name: Linux-2.6.28-ADI-2009R1-pre-svn6
Image Type: Blackfin Linux Kernel Image (gzip compressed)
Data Size: 1006736 Bytes = 983.1 kB
Load Address: 00001000
Entry Point: 001b0fa4
Verifying Checksum ... OK
Uncompressing Kernel Image ... OK
Starting Kernel at = 1b0fa4
Linux version 2.6.28-ADI-2009R1-pre-svn6028 (root@debian) (gcc version 4.1.2 (ADI svn)) #31 Wed Feb 4 10:35:45 CST 2009
Board Memory: 32MB
Kernel Managed Memory: 32MB
Memory map:
fixedcode = 0x00000400-0x00000490
text = 0x00001000-0x0012f260
rodata = 0x0012f260-0x001883f4
bss = 0x00188400-0x00197124
data = 0x00197124-0x001aa000
stack = 0x001a8000-0x001aa000
init = 0x001aa000-0x001c3000
available = 0x001c3000-0x01eff000
DMA Zone = 0x01f00000-0x02000000
Hardware Trace Active and Enabled
Boot Mode: 6
Blackfin support (C) 2004-2008 Analog Devices, Inc.
Compiled for ADSP-BF532 Rev 0.5
Blackfin Linux support by http://blackfin.uclinux.org/
Processor Speed: 400 MHz core clock and 133 MHz System Clock
Built 1 zonelists in Zone order, mobility grouping off. Total pages: 7873
Kernel command line: console=ttyBF0,115200
Configuring Blackfin Priority Driven Interrupts
PID hash table entries: 128 (order: 7, 512 bytes)
console [ttyBF0] enabled
Dentry cache hash table entries: 4096 (order: 2, 16384 bytes)
Inode-cache hash table entries: 2048 (order: 1, 8192 bytes)
Memory available: 29636k/32768k RAM, (100k init code, 1208k kernel code, 492k data, 1024k dma, 304k reserved)
Calibrating delay loop... 782.33 BogoMIPS (lpj=1564672)
Security Framework initialized
Mount-cache hash table entries: 512
Blackfin Scratchpad data SRAM: 4 KB
Blackfin L1 Data A SRAM: 16 KB (15 KB free)
Blackfin L1 Data B SRAM: 16 KB (16 KB free)
Blackfin L1 Instruction SRAM: 48 KB (41 KB free)
PDA for CPU0 reserved at 001890e8
net_namespace: 424 bytes
NET: Registered protocol family 16
Blackfin GPIO Controller
Blackfin DMA Controller
ip0x_init(): registering device resources
SCSI subsystem initialized
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
NET: Registered protocol family 2
IP route cache hash table entries: 1024 (order: 0, 4096 bytes)
TCP established hash table entries: 1024 (order: 1, 8192 bytes)
TCP bind hash table entries: 1024 (order: 0, 4096 bytes)
TCP: Hash tables configured (established 1024 bind 1024)
TCP reno registered
NET: Registered protocol family 1
msgmni has been set to 57
io scheduler noop registered
io scheduler anticipatory registered (default)
io scheduler cfq registered
Serial: Blackfin serial driver
bfin-uart.1: ttyBF0 at MMIO 0xffc00400 (irq = 21) is a BFIN-UART
brd: module loaded
dm9000 Ethernet Driver, V1.31
dm9000 dm9000.0: read wrong id 0x4a4a4a4a
dm9000 dm9000.0: read wrong id 0x4a4a4a4a
dm9000 dm9000.0: read wrong id 0x4a4a4a4a
dm9000 dm9000.0: read wrong id 0x4a4a4a4a
dm9000 dm9000.0: read wrong id 0x4a4a4a4a
dm9000 dm9000.0: read wrong id 0x4a4a4a4a
dm9000 dm9000.0: read wrong id 0x4a4a4a4a
dm9000 dm9000.0: read wrong id 0x4a4a4a4a
dm9000 dm9000.0: wrong id: 0x4a4a4a4a
dm9000 dm9000.0: not found (-19).
dm9000 dm9000.1: read wrong id 0x4a4a4a4a
dm9000 dm9000.1: read wrong id 0x4a4a4a4a
dm9000 dm9000.1: read wrong id 0x4a4a4a4a
dm9000 dm9000.1: read wrong id 0x4a4a4a4a
dm9000 dm9000.1: read wrong id 0x4a4a4a4a
dm9000 dm9000.1: read wrong id 0x4a4a4a4a
dm9000 dm9000.1: read wrong id 0x4a4a4a4a
dm9000 dm9000.1: read wrong id 0x4a4a4a4a
dm9000 dm9000.1: wrong id: 0x4a4a4a4a
dm9000 dm9000.1: not found (-19).
Driver 'sd' needs updating - please use bus_type methods
usbmon: debugfs is not available
driver isp1362-hcd, 2005-04-04
isp1362-hcd isp1362-hcd.0: ISP1362 Host Controller
isp1362-hcd isp1362-hcd.0: new USB bus registered, assigned bus number 1
isp1362_hc_reset:
Software reset timeout
Clock not ready after 100ms
isp1362-hcd isp1362-hcd.0: can't setup
isp1362-hcd isp1362-hcd.0: USB bus 1 deregistered
init error, -19
Initializing USB Mass Storage driver...
usbcore: registered new interface driver usb-storage
USB Mass Storage support registered.
ip_tables: (C) 2000-2006 Netfilter Core Team
TCP cubic registered
NET: Registered protocol family 17
drivers/rtc/hctosys.c: unable to open rtc device (rtc0)
VFS: Cannot open root device "<NULL>" or unknown-block(0,0)
Please append a correct "root=" boot option; here are the available partitions:
Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(0,0)
发帖者 Blackfin 时间： 10:57:00 0 评论
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2009年1月18日

miniBfin板引导u-boot成功

经过几天的调试，今天终于可以成功boot起来了。

主要问题：
1。使用DLC5下载线烧code很不稳定，经常在写的过程中hangup
或写完后校验出错，后改用WIGGLER下载线就很稳定了。原因不明。
2。测试中发现两个排阻中有1~2电阻居然在焊接中烧坏了。

下面启动的一些信息。

U-Boot 1.1.5 (Jan 18 2009 - 14:37:34)

CPU: ADSP BF532 Rev.: 0.5
Board: miniBfin
http://bfincn.blogspot.com
Clock: VCO: 400 MHz, Core: 400 MHz, System: 133 MHz
SDRAM: 32 MB
*** Warning - bad CRC, using default environment

In: serial
Out: serial
Err: serial
No NAND device found!!!
0 MiB
No ethernet found.
starting from spi flash
Hit any key to stop autoboot: 3  2  1  0

EEPROM @0x0 read: addr 0x01000000 off 0x30000 count 0x110000

done
## Booting image at 01000000 ...
Bad Magic Number
bfin>?

? - alias for 'help'
autoscr - run script from memory
base - print or set address offset
bdinfo - print Board Info structure
boot - boot default, i.e., run 'bootcmd'
bootd - boot default, i.e., run 'bootcmd'
bootm - boot application image from memory
bootp - boot image via network using BootP/TFTP protocol
cmp - memory compare
coninfo - print console devices and information
cp - memory copy
crc32 - checksum calculation
echo - echo args to console
eeprom - EEPROM sub-system
go - start application at address 'addr'
help - print online help
iminfo - print header information for application image
imls - list all images found in flash
itest - return true/false on integer compare
loop - infinite loop on address range
md - memory display
mm - memory modify (auto-incrementing)
mtest - simple RAM test
mw - memory write (fill)
nand - NAND sub-system
nboot - boot from NAND device
nfs - boot image via network using NFS protocol
nm - memory modify (constant address)
ping - send ICMP ECHO_REQUEST to network host
printenv- print environment variables
rarpboot- boot image via network using RARP/TFTP protocol
reset - Perform RESET of the CPU
run - run commands in an environment variable
saveenv - save environment variables to persistent storage
setenv - set environment variables
sleep - delay execution for some time
tftpboot- boot image via network using TFTP protocol
version - print monitor version
bfin>
发帖者 Blackfin 时间： 22:39:00 0 评论
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2009年1月17日

使用JTAG调试miniBfin板

1. 启动gdbproxy，要使用配置了libbfemu的版本
     # gdbproxy bfin
    
2. 启动gdb
     # bfin-uclinux-gdb
     (gdb)target remote : 2000
    
3. 使用gdb命令查看寄存器值
     1)PLL Divide register
     (gdb) p /x *0xffc00004
           => 0x0003 SSEL=3 CSEL=0
     2)PLL Control register
     (gdb) p /x *0xffc00000
           => 0x5000 DF=0 MSEL=40
     计算频率：
     if(!MSEL)
         VCO = CLKIN/(DF+1) * MSEL
     else
         VCO = CLKIN/(DF+1)
    
     CCLK = VCO/(2^CSEL) (core clock)
     SCLK = VCO/SSEL     (system clock)
     所以：
     输入晶阵10MHz,
     VCO = 10M/1 * 40 = 400MHz
     CCLK = 400M/(2^0) = 400MHz
     SCLK = 400M/3 = 133MHz
     3)SDRAM Memory Global Control Register
     (gdb) p /x *0xffc00a10
           => 0x801111cd
           CDDBG 0 - continue driving SDRAM
                     controls during bus grant
           TCSR  0 - 45 degrees C
           FBBRW 0 - Disabled
           EBUFE 0 - External buffering timing disabled
           SRFS  0 - Disable self-refresh
           PSSE  0 - No effect
           PSM   0 - Precharge, 8 CBR refresh cycles,
                     mode register set
           PUPSD 0 - No extra delay added before first
                     Precharge command
           TWR   10 - 2 cycles
           TRCD  010 - 2 cycles
           TRP   010 - 2 cycles
           TRAS  0111 - 7 cycles
           PASR  00 - All 4 banks refreshed
           CL    11 - 3 cycles
           SCTE  1 - Enabled
     4)SDRAM Memory Bank Control register
     (gdb) p /x *0xffc00a14
           => 0x13
           EBE   1 - Enabled
           EBSZ  01 - 32Mbyte
           EBCAW 01 - 9bits
     5)SDRAM Control Status Register
     (gdb) p /x *0xffc00a1c
           => 0x0001
           BGSTAT 0 - Bus not granted
           SDEASE - W1C 0 - No error detected
           SDRS   0 - SDRAM already powered up
           SDPUA  0 - SDC not in power up sequence
           SDSRA  0 - SDRAMs not in self-refresh mode
           SDCL   1 - SDC is idle
     6)SDRAM Refresh Rate Control Register
     (gdb) p /x *0xffc00a18
           => 0x0408

4. 查看Memory内容
   例如查看0x01ef0000开始的128字节的内容
   (gdb) x /128xh 0x01ef0000
  
   设置memory值
   (gdb) set *0x01ef0000 = 0x1168
   (gdb) p /x *0x01ef0000

发帖者 Blackfin 时间： 17:46:00 0 评论
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2009年1月14日

BF532芯片内调试UART程序补充

编译步骤：
0. 替换jump.S文件
1. 修改u-boot/tools/bin2ldr/runme.sh，减小code size
# strongly recommend to run this script to convert u-boot.bin to LDR format file
#!/bin/sh
if [ -e ../../u-boot.bin ];then
make clean
make all
echo "" > app.bin
./bin2ldr
bfin-uclinux-objcopy -I binary -O ihex app.ldr app.hex
make distclean
else
echo -e "ERR:Please build the u-boot package first"
fi

2. run ./runme.sh
3. brun app.ldr to sflash
4. app.ldr的内容(无法上传，郁闷！)
发帖者 Blackfin 时间： 23:54:00 0 评论
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2009年1月12日

SDT下载电缆原理图

手上有一块ARM44b0x的JTAG子板，之前用ADS1.20调试过程序，但一直不清楚它的接口是如何定义的。今天在网上找到原理图，转载于此以备忘。

S3C2410简易JTAG详解 常见的JTAG cable结构都比较简单，一端是DB25，接到电脑的并口上，中间经过74HC244和一些电阻实现电平转换(5V3.3V?)(也有比较猥琐的只用了 几个100 Ohm电阻的方案)，另一端的JTAG header接到目标板的JTAG interface。
并口DB25原先主要是用来连接打印机，其引脚定义如下：
25 Pin D-Sub SPP SIGNAL DIRECTION IN/OUT
1 /Strobe In/Out
2 Data 0 Out
3 Data 1 Out
4 Data 2 Out
5 Data 3 Out
6 Data 4 Out
7 Data 5 Out
8 Data 6 Out
9 Data 7 Out
10 /ACK In
11 Busy In
12 Paper Out In
13 Select In
14 /Line Feed In/Out
15 /Error In
16 /INIT In/Out
17 /Select In In/Out
18-25 Ground GND
可见，数据线Pin2~Pin9可以用来发送数据，Pin10~Pin13等可以用来接收数据。
JTAG的数据传输形式是串行，主要使用了以下引脚：
TDI (Test Data In)
TDO (Test Data Out)
TCK (Test ClocK)
TMS (Test Mode Select)
TRST (Test ReSeT) optional.
因此，DB25-JTAG实际上只利用了DB25的少数几根线。但由于DB25的8条数据线都可以作为output，市面上就出现了各种使用不同Pin Assignment的JTAG线。

例如Wiggler的Pin assignment:
TMS : Pin3 (D1)
TCK : Pin4 (D2)
TDI : Pin5 (D3)
TDO : Pin11 (Busy)
SRST : Pin2 (D0)
TRST : Pin6 (D4)
(参见Wiggler的电路图，但最后的nSRST和nTRST可能不一定用到，并且在H-JTAG中的定义也不一样，TRST是Pin2，没有SRST)
H-JTAG里还有另外一种接法--STD，定义如下：
TMS : Pin3 (D1)
TCK : Pin2 (D0)
TDI : Pin8 (D6)
TDO : Pin13 (Select)
SRST : N/A
TRST : Pin4 (D2)
而S3C2410的烧写程序SJF2410用的是：
TCK : Pin2 (D0)
TDI : Pin3 (D1)
TMS : Pin4 (D2)
TDO : Pin11 (Busy)
这个可以在源代码中的jtag.h文件里看到。
除了DB25那边的Pin Assignment有多种方案，JTAG connector也有20pin, 14pin, 12pin, 10pin等几种标准。这里一块ARM9开发板配的DB25-JTAG转换板就十分好玩，上面也是只有一块244，但是有Wiggler, STD, S3C2410三个20pin接口。由于20pin connector的Pin Assignment是固定的，三个接口对应的是DB25那边的三种接法，因此开发板可以根据pc上运行的程序不同选择不同的接口来接。
20Pin Connector的定义如下(参考此图)：
Vcc ← 1 2 → NC
nTRST ← 3 4 → GND
TDI ←5 6 → GND
TMS ←7 8 → GND
TCK ←9 10 → GND
GND ←11 12 → GND
TDO ←13 14 → GND
NRESET ←15 16 → GND
NC ←17 18 → GND
NC ←19 20 → GND
14Pin:
nTRST ← 1 2 → GND
TDI ← 3 4 → GND
TDO ← 5 6 → GND
TMS ←7 8 → GND
TCK ←9 10 → GND
nSRST ←11 12 → n/a
DINT ←13 14 → Vcc
(DINT pin is used to raise Debug Interrupt. Many chips has no this pin.)
12Pin:
nTRST ← 1 2 → GND
TDI ← 3 4 → GND
TDO ← 5 6 → GND
TMS ← 7 8 → GND
TCK ← 9 10 → GND
nSRST ←11 12 → GND
10Pin:
TCK ← 1 2 → Vcc
TDI ← 3 4 → Vcc
TDO ← 5 6 → GND
TMS ← 7 8 → GND
nTRST← 9 10 → GND
发帖者 Blackfin 时间： 23:46:00 0 评论
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2009年1月11日

miniBfin板JTAG简单检测

今天电路板焊好后用JTAG简单检测一下能否检测到CPU和SFlash，一切正常。
发帖者 Blackfin 时间： 21:37:00 0 评论
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2008年11月26日

BF532芯片内调试UART程序

今天写了一段UART串口消息输出调试代码，用于加载到芯片L1 RAM中运行测试UART的连接情况，成功输出信息：Hello Bfincn
代码比较简单，大家看看就明白了。

#include "bin2ldr.h"

#define hi(x) (x >> 16)
#define lo(x) (x & 0xffff)

/* UART Controller (0xFFC00400 - 0xFFC004FF) */
/* Transmit Holding register */
#define UART_THR   0xFFC00400 
/* Receive Buffer register */
#define UART_RBR   0xFFC00400 
/* Divisor Latch (Low-Byte) */
#define UART_DLL   0xFFC00400 
/* Interrupt Enable Register */
#define UART_IER   0xFFC00404 
/* Divisor Latch (High-Byte) */
#define UART_DLH   0xFFC00404 
/* Interrupt Identification Register */
#define UART_IIR   0xFFC00408 
/* Line Control Register */
#define UART_LCR   0xFFC0040C 
/* Modem Control Register */
#define UART_MCR   0xFFC00410 
/* Line Status Register */
#define UART_LSR   0xFFC00414 
/* SCR Scratch Register */
#define UART_SCR   0xFFC0041C 
/* Global Control Register */
#define UART_GCTL  0xFFC00424 


/* Initialise UART */
p0.h = hi(UART_LCR);
p0.l = lo(UART_LCR);

/* 8-bit word; 1 stop bit; No parity */
r0 = 0x83(Z);
w[p0] = r0.l; /* To enable DLL writes */
ssync;

p0.h = hi(UART_DLL);
p0.l = lo(UART_DLL);

/* SCLK = 133MHz, BaudRate=115200
   BaudRate = SCLK /(16 * Divisor) */
r0 = 0x48(Z);
w[p0] = r0.l;
ssync;

p0.h = hi(UART_DLH);
p0.l = lo(UART_DLH);
r0 = 0x00(Z);
w[p0] = r0.l;
ssync;

p0.h = hi(UART_GCTL);
p0.l = lo(UART_GCTL);
r0 = 0x1(Z);
w[p0] = r0.l; /* To enable UART clock */
ssync;
 
/* Begin to process rx/tx data */
p0.h = hi(UART_LCR);
p0.l = lo(UART_LCR);

/* 8-bit word; 1 stop bit; No parity */
r0 = 0x03(Z);
/* To enable access THR/PBR */
w[p0] = r0.l; 
ssync;
 
/* Write 'Hello Bfincn' to Console */
p0.h = hi(UART_THR);
p0.l = lo(UART_THR);
r0 = 0x48(Z); /* H */
w[p0] = r0.l; 
ssync;
 
ww1:
 p0.h = hi(UART_LSR);
 p0.l = lo(UART_LSR);
 r0 = w[p0](z);
 cc = bittst(r0,5);
 if !cc jump ww1;

 p0.h = hi(UART_THR);
 p0.l = lo(UART_THR);
 r0 = 0x65(Z); /* e */
 w[p0] = r0.l; 
 ssync;

ww2:
 p0.h = hi(UART_LSR);
 p0.l = lo(UART_LSR);
 r0 = w[p0](z);
 cc = bittst(r0,5);
 if !cc jump ww2;
  
 p0.h = hi(UART_THR);
 p0.l = lo(UART_THR);
 r0 = 0x6c(Z); /* l */
 w[p0] = r0.l; 
 ssync;

ww3:
 p0.h = hi(UART_LSR);
 p0.l = lo(UART_LSR);
 r0 = w[p0](z);
 cc = bittst(r0,5);
 if !cc jump ww3;
  
 p0.h = hi(UART_THR);
 p0.l = lo(UART_THR);
 r0 = 0x6c(Z); /* l */
 w[p0] = r0.l; 
 ssync;

ww4:
 p0.h = hi(UART_LSR);
 p0.l = lo(UART_LSR);
 r0 = w[p0](z);
 cc = bittst(r0,5);
 if !cc jump ww4;
  
 p0.h = hi(UART_THR);
 p0.l = lo(UART_THR);
 r0 = 0x6f(Z); /* l */
 w[p0] = r0.l; 
 ssync;

ww5:
 p0.h = hi(UART_LSR);
 p0.l = lo(UART_LSR);
 r0 = w[p0](z);
 cc = bittst(r0,5);
 if !cc jump ww5;
  
 p0.h = hi(UART_THR);
 p0.l = lo(UART_THR);
 r0 = 0x20(Z); /* space */
 w[p0] = r0.l; 
 ssync;

ww6:
 p0.h = hi(UART_LSR);
 p0.l = lo(UART_LSR);
 r0 = w[p0](z);
 cc = bittst(r0,5);
 if !cc jump ww6;
  
 p0.h = hi(UART_THR);
 p0.l = lo(UART_THR);
 r0 = 0x42(Z); /* B */
 w[p0] = r0.l; 
 ssync;

ww7:
 p0.h = hi(UART_LSR);
 p0.l = lo(UART_LSR);
 r0 = w[p0](z);
 cc = bittst(r0,5);
 if !cc jump ww7;
  
 p0.h = hi(UART_THR);
 p0.l = lo(UART_THR);
 r0 = 0x66(Z); /* f */
 w[p0] = r0.l; 
 ssync;

ww8:
 p0.h = hi(UART_LSR);
 p0.l = lo(UART_LSR);
 r0 = w[p0](z);
 cc = bittst(r0,5);
 if !cc jump ww8;
  
 p0.h = hi(UART_THR);
 p0.l = lo(UART_THR);
 r0 = 0x69(Z); /* i */
 w[p0] = r0.l; 
 ssync;

ww9:
 p0.h = hi(UART_LSR);
 p0.l = lo(UART_LSR);
 r0 = w[p0](z);
 cc = bittst(r0,5);
 if !cc jump ww9;
  
 p0.h = hi(UART_THR);
 p0.l = lo(UART_THR);
 r0 = 0x6e(Z); /* n */
 w[p0] = r0.l; 
 ssync;

ww10:
 p0.h = hi(UART_LSR);
 p0.l = lo(UART_LSR);
 r0 = w[p0](z);
 cc = bittst(r0,5);
 if !cc jump ww10;
  
 p0.h = hi(UART_THR);
 p0.l = lo(UART_THR);
 r0 = 0x63(Z); /* c */
 w[p0] = r0.l; 
 ssync;

ww11:
 p0.h = hi(UART_LSR);
 p0.l = lo(UART_LSR);
 r0 = w[p0](z);
 cc = bittst(r0,5);
 if !cc jump ww11;
  
 p0.h = hi(UART_THR);
 p0.l = lo(UART_THR);
 r0 = 0x6e(Z); /* n */
 w[p0] = r0.l; 
 ssync;
 
ww12:
 p0.h = hi(UART_LSR);
 p0.l = lo(UART_LSR);
 r0 = w[p0](z);
 cc = bittst(r0,0);
 if !cc jump ww12;
  
 /* read from buffer */
 p0.h = hi(UART_RBR);
 p0.l = lo(UART_RBR);
 r1 = w[p0](z);
 
/* send buffer is empty or not */
wait:
 p0.h = hi(UART_LSR);
 p0.l = lo(UART_LSR);
 r0 = w[p0](z);
 cc = bittst(r0,5);
 if !cc jump wait;

 /* write back to console */
 p0.h = hi(UART_THR);
 p0.l = lo(UART_THR);
 w[p0] = r1.l; 
 ssync;
 
 /* if user enter the char 'q' then exit */
 r1 = 0x72(z);
 cc = r0 == r1; /* q */
 if !cc jump ww12;

 p0.l = (APP_ENTRY & 0xFFFF);
 p0.h = (APP_ENTRY >> 16);
 jump (p0);
发帖者 Blackfin 时间： 22:34:00 0 评论
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2008年11月2日

BF532使用jtag调试时的一些问题

BF532电路板焊接好之后如果上电没有什么问题，我们就可以使用jtag工具开始调试了。Blackfin开源工具相对来说是做的不错的，而且大部分都集中在blackfin.uclinux.org网站上。但感觉上这些工具的开发并不同步，有点点混乱。比如说jtag工具就有几个版本，功能上还相差挺大，为什么不统一Merge到一个版本中呢？这之中可能有些什么其他原因咱就不得而知。这里简单总结下可能碰到问题，以作备忘吧。
1. 如何使用PCMCIA并口卡
现在大多数的Notebook已经没有串并口，我们可以买一块PCMCIA串口卡或并口卡来使用。但是通常并口卡的地址是0x378，我们如何确定PCMCIA并口卡的端口地址呢？在Linux平台上，可以这样查看并口地址：
#cat /proc/ioports
列出所有端口的地址，从中找出并口的端口地址。
在我的机器上就是上面红色线条框住的地址，可以用0x1810替换0x378地址。
在WindownXp平台上，可以这样查看。
控制面板-->系统-->设备管理器

双击LPT3查看配置：
2. 检测BF532设备ID
过程如下：
jtag> cable parallel 0x1810 DLC5
jtag> detect
jtag就会输出检测到的DeviceID等信息。如果没有任何反映，检查板子上Jtag nTRST脚有没有电位拉高，因为nTRST为低电位时BF532处于jtag复位状态，而有些jtag调试板又不会拉高该Pin脚或根本就不会用到该Pin脚，这时我们手动在nTRST和VCC3V3之间串接一个500欧的电阻即可。
还有一个问题，如果出现STEPPING错误，请添加"0101 bf533 5"到文件/usr/local/share/jtag/analog/bf533/STEPPING最后。如下所示：
3. 串行Flash检测
jtag> initbus bf532_bf1
jtag> spidetectflash 0
如果initbus bf532_bf1错误，你该下载另外一个jtag工具了jtagprog_bf532，这也就我说的这些工具之间没有同步代码的问题。

4. 使用jtag和gdbproxy调试代码
使用方法网上有很多的介绍，这里只说明一下，gdbproxy下载这个bfemu_gdbproxy即可。

5. jtag调试代码的原理，有兴趣的朋友看看这片文章吧，强烈推荐之《ARM JTAG 调试原理》。去网上搜索一下吧，很多地方可以下载到。
发帖者 Blackfin 时间： 14:44:00 0 评论
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